11 research outputs found

    Monitoring-aware network-on-chip design

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    Bringing communication networks on a chip: test and verification implications

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    Event-based debugging of Aethereal systems-on-chips : a layered approach

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    State of the Art in processor test and debug.

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    Bringing communication networks on a chip : test and verification implications

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    In this article we present test and verification challenges for system chips that utilize on-chip networks. These SOCs and networks on a chip are introduced, where the NOC is exemplified by Philips' AE THEREAL NOC architecture. We discuss existing test and verification methods for SOCs and NOCs, and show the particular advantages of using an NOC for both testing and verifying the network, and testing and verifying the other components of the SOC. This article is concluded with our experiences with NOCs and a description of ongoing work within Philips in this emerging field

    Electronic device, system on chip and method for monitoring a data flow

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    An electronic device is provided which comprises a plurality of processing units (IP1-IP6), a network-based inter-connect (N) coupled to the processing units (IP1-IP6) and at least one monitoring unit (P1, P2) for monitoring a data flow of at least one first communication path between the processing units (IP1-IP6) and for forwarding monitoring results at least temporarily via at least two separate communication paths (MC1, MC2)

    An event-based monitoring service for networks on chip

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    Networks on chip (NoCs) are a scalable interconnect solution for large scale multiprocessor systems on chip (SoCs). However, little attention has been paid so far to the monitoring and debugging support for NoC-based systems. We propose a generic on-line event-based NoC monitoring service, based on hardware probes attached to NoC components. The proposed monitoring service offers run-time observability of NoC behavior and supports system-level and application debugging. The defined service can be accessed and configured at run-time from any network interface port. We present a probe architecture for the monitoring service, together with its associated programming model and traffic management strategies. We prove the feasibility of our approach via a prototype implementation for the Æthereal NoC. The additional monitoring traffic is low; typical monitoring connection configuration for a NoC-based SoC application needs only 4.8KB/s, which is 6 orders of magnitude lower than the 2GB/s per link raw bandwidth offered by theÆthereal NoC

    Congestion-controlled best-effort communication for networks-on-chip

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    Abstract. Congestion has negative effects on network performance. In this paper, a novel congestion control strategy is presented for Networks-on-Chip (NoC). For this purpose we introduce a new communication service, congestioncontrolled best-effort (CCBE). The load offered to a CCBE connection is controlled based on congestion measurements in the NoC. Link utilization is monitored as a congestion measure, and transported to a Model Predictive Controller (MPC). Guaranteed bandwidth and latency connections in the NoC are used for this, to assure progress of link utilization data in a congested NoC. We also present a simple but effective model for link utilization for the model-based predictions. Experimental results show that the presented strategy is effective and has reaction speeds of several microseconds which is considered acceptable for realtime embedded systems. 1

    Mixed adaptation and fixed-reservation QoS for improving picture quality and resource usage of multimedia (NoC) chips

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    Advanced video systems running multiple applications require an efficient distribution of system resources. An adaptable computing system can be created with a reconfigurable Network-on-Chip (NoC). Execution of multiple multimedia processing tasks implicitly ask for a reservation-based Quality-of-Service (QoS) control. However, pure reservation-based systems have rigid rules for assigning resource budgets, leading to a slow reaction time on activity change or a long reconfiguration time. In this paper, we present an application-specific QoS solution that combines a reservation-based approach with a run-time adaptation facility. We demonstrate this framework by mapping an MPEG-4 arbitrary-shaped video decoder on an NoC of eight ARM cores with specific monitoring features in the network (e.g. Æthereal NoC). First, we have found that our advanced QoS can save up to 32% of communication resources. Second, we have obtained experimental results showing the absolute PSNR of approximately 35 dB with a quality improvement of 1-5 dB, using the "Stefan" tennis sequence, as compared to the implementation with reservation-based approach only.. © 2006 IEEE
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